SMP has many uses in science, industry, and business which often use custom-programmed software for multithreaded processing. However, most consumer products such as word processors and computer games are written in such a manner that they cannot gain large benefits from SMP systems. For games this is usually because writing a program to increase performance on SMP systems can produce a performance loss on uniprocessor systems. Recently, however, multi-core chips have become the norm in new computers, and the balance between installed uni- and multi-core computers may change in the coming years.
The nature of the different programming methods would generally require two separate code-trees to support both uniprocessor and SMP systems with maximum performance. Programs running on SMP systems may experience a performance increase even when they have been written for uniprocessor systems. This is because hardware interrupts that usually suspend program execution while the kernel handles them can run on an idle processor instead. The effect in most applications (e.g. games) is not so much a performance increase as the appearance that the program is running much more smoothly. In some applications, particularly compilers and some distributed computing projects, one will see an improvement by a factor of (nearly) the number of additional processors.
In situations where more than one program runs at the same time, an SMP system will have considerably better performance than a uni-processor because different programs can run on different CPUs simultaneously.
Systems programmers must build support for SMP into the operating system: otherwise, the additional processors remain idle and the system functions as a uniprocessor system.
In cases where an SMP environment processes many jobs, administrators often experience a loss of hardware efficiency. Software programs have been developed to schedule jobs so that the processor utilization reaches its maximum potential. Good software packages can achieve this maximum potential by scheduling each CPU separately, as well as being able to integrate multiple SMP machines and clusters.
Access to RAM is serialized; this and cache coherency issues causes performance to lag slightly behind the number of additional processors in the system.
Answered by
Alok Gupta
at
5:29 PM on December 27, 2008